I am a PhD candidate in the Department of Electrical & Computer Engineering at Purdue University, USA.


From August 2005 I am a Research Assistant in  Nanoelectronics Research Lab, under the guidance of Professor Kaushik Roy. My primary research focus is on the development of system-level design techniques for low-power and error resilient nanoscale systems. More information about my research work can be found in research and publications pages.   


In the summer of 2008 I was with the Advanced Technology Group, Qualcomm, San Diego as an intern and explored the 3d integration feasibility of logic/memory. I also involved in a project for analyzing potential sensitive gates in 45nm technology using a Variability Aware Modeling tool (VAM) that was co-developed with IMEC’s TAD team, Belgium.


I also worked in Microelectronics Lab at Intracom S.A., Athens, Greece in the summer of 2003 and in Foundation of Research & Technology, Heraklion, Greece in the summer of 2002 as an intern.


Further information can be found in my Curriculum Vitae and in next pages. Please feel free to contact me for further information.


© gkarakon@purdue.edu

  Email: gkarakon@purdue.edu            Address: 465 Northwestern Avenue, MSEE 286, West Lafayette, IN, 47907, USA

Georgios Karakonstantis

Phd Candidate

Electrical & Computer Engineering

Nanoelectronics Research Laboratory  ( NRL)

Purdue University

Tuesday, October 26, 2010





- The book “Low-Power Variation-Tolerant Design In Nanometer Silicon” can be pre-ordered.




- Papers on energy efficient DWT and Data-Dependent Flip-Flops   accepted in ICCD and CICC.


- Our research on news: EDACAFE, Chip Design.




- HERQULES a paper for the exploration and design of energy efficient systems   accepted in ISLPED 2010.


- The paper on low power wavelet based seizure detection system accepted in ISLPED 2010.


-The paper on lifetime enhancement under NBTI accepted in IOLTS 2010.


-Our project i-QCAM awarded 3rd  position in Altera Innovate Design Contest ‘10.