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© gkarakon@purdue.edu |
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Georgios Karakonstantis |
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Phd Candidate |
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Electrical & Computer Enineering |
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Nanoelectronics Research Laboratory ( NRL) |
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Purdue University |
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Process Variations Tolerant - Low Power Design of DSP blocks Develop techniques for the design of low power and process tolerant systems. Application to Color Interpolation Filtering (ICCAD ‘07, TCAD‘09), Discrete Cosine Transform- DCT (DATE ‘07, TVLSI ‘09), Motion Estimation (ISLPED ‘09) |


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Algorithm/Architecture Co-Optimization for Low Power Design |
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Develop optimization techniques for Low Power Design. Application to FIR filtering (ICASSP ‘07) |
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Low Power - Error Resilient Execution Units Avoid possible delay failures in the critical paths by dynamically stretching the clock period. This allows circuits to operate at scaled supply with minimal performance degradation. (ISLPED ‘07, TVLSI ‘09) |
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Monday, July 13, 2009 |
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Home | Research | Publications | Teaching | Photos | Links |
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Framework for enabling Voltage Over-scaling of DSP Systems (Logic/Memory) |
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Develop techniques for the design of voltage over-scalable DSP Systems considering system level interactions and unequal error protection. Application to a DCT/IDCT System (SIPS ‘09) |