Georgios Karakonstantis

Phd Candidate


Electrical & Computer Engineering

Nanoelectronics Research Laboratory  ( NRL)

Purdue University

Tuesday, October 26, 2010

     With rapid growth of multimedia services within mobile environments, the demand for signal processing systems that deliver high performance levels under diminishing power budgets has increased tremendously. The goal of our project is to design an energy-aware digital camera which can be used as a portable digital photo book without compromising performance, by utilizing the novel concept of adaptive quality modulation based on significance driven computation.  In general, in DSP applications, not all computations are equally important in determining the output quality. Based on this observation, we first identify the most crucial operations that are imperative for providing a good output quality. High performance and low power are the different sides of the same coin. Under high performance or low power requirements, our system discards computations of each block that contribute the least to the output image quality. By doing so, we are reducing the number of cycles required, that translates to increased performance with minor quality degradation. Furthermore, less number of computations also reduces the number of read/write transactions from/to the memory. The reduced number of operational cycles in terms of memory accesses and computations under user requirements reduces the energy consumed by the overall system.

    The proposed system is able to adapt to quality and power requirements of the user at a given time instant with minimum quality reduction. Therefore, the proposed system uses efficiently the on chip resources and limited energy sources of portable devices providing just in time power and quality, which is a necessary characteristic of today’s complex systems. Of the various functions in a digital camera, image compression and decompression is the computational bottleneck. We have profiled a software JPEG implementation using the embedded profiler in the Nios II EDS and identified the computationally intensive functions. Specifically, DSP blocks of the JPEG encoder/decoder, such as DCT (Discrete Cosine Transform), IDCT (Inverse DCT), color conversion block, etc. are computationally intensive and need to be modified. We select to analyze and demonstrate the innovative significant driven design scheme using the JPEG decoder since decoders generally offer more flexibility to the user. This allows users to capture the image with high quality and later decide on power, quality modes. This applies to a scenario that users of mobile devices such as cameras/ cell phones/ digital photo books face every day in our era. Specifically, users preview their photos on their portable device a lot of times in one day. Under such scenario the best quality is not necessary and allows applying techniques for low power. We are demonstrating the power savings and quality adaptiveness of our concept for such scenario. In addition, we explore various techniques for accelerating each module and we show the resulting performance.   

      The Altera FPGA devices offer the ability to verify the functionality and effectiveness of the proposed scheme fast and easy. The provided coding, verification, synthesis and mapping tools are proven to be very easy in use. In addition Altera and the Terasic DE-2 board provides ready to use design examples and interfaces such as camera module, memory and VGA interfaces that allowed us to verify and visualize the results of our novel design.  

         Altera Innovate Design Contest


i-QCAM: Intelligent, Quality-Adaptive  

                Digital Camera



     Georgios Karakonstantis

      Vaibhav Gupta

      Himanshu S. Markandeya


Academic Mentors:

      Prof. Kaushik Roy,

      Prof. Anand Raghunathan


         Watch  part of our demo in video












 Update - April-2010: Awarded 3rd Position

              March-2010: Selected as Top 5 Finalists