ECE 595A CMOS Analog IC Design

Spring 2006

Prof. Byunghoo Jung

School of Electrical and Computer Engineering

HW #2

ü       Problem 2.13 (a)

ü       Small signal gain analysis for Fig 3.67 (a) (e) & Fig 3.68 (c) (d)

ü       Output impedance analysis for Fig 3.70 (b)

ü       Problems 3.20 and 3.21

ü       Differential mode gain for Fig 3.70 (b)

ü       Problems 4.20 and 4.22

ü       HW #2 won’t be graded. The solution will be posted before the first exam.

 

Download makeup class file (Windows Media File)

ü       Class1 (272MB): Please be aware of the size of the file. High-speed connection is recommended. The original files are available in my office (MSEE218). Please visit my office to make a copy.

 

Course Information

ü       An additional course website maintained by the TA is “here”

ü       Handouts

Ø       Course description

Ø       Project Description and Schedule

ü       Homework (check on TA site as well)

Ø       Homework 1 (will be announced soon)

ü       Technology used in the course: TSMC 0.25u CMOS technology (mosis spice parameter link)

ü       NOTE: The technology has been changed to TSMC 0.18u CMOS!!! (mosis spice parameter link)

 

Text & Reference

ü       Required Text: Design of Analog CMOS Integrated Circuits by Behzad Razavi (MaGraw-Hill)

ü       References: Analog Integrated Circuit Design by David Johns and Ken Martin (Wiley)

 

Instructor & TA

ü       Instructor: Byunghoo Jung (494-2866, jungb@prudue.edu)

Ø       Office hours: TTh 2:45PM~4:15PM, Room 218, MSEE Bldg, or by appointment

ü       TA: Myeong-Eun Hwang (494-0759, hwangm@ecn.purdue.edu)

Ø       Office hours: Wed 5:00PM~6:50PM, Room TBD; Facilitate and maintain the use of Lab design tools

 

Course Outcomes (ABET):

A student who successfully fulfills the course requirements will have demonstrated:

ü       An ability to analyze bias circuit using CMOS current mirror

ü       An ability to design differential operational amplifier

ü       An ability to analyze basic gm-C filter

ü       Experience in oral presentation, teamwork, and document preparation for a finished design project

 

Important Deadlines & Exam Schedule

ü       Project Proposal Due: submit to the instructor (MSEE233C) by 6:00PM on Mon., Jan. 30

ü       Interim Project Report Due: submit to the instructor (MSEE233C) by 6:00PM on Mon., Mar. 31 (Updated!!)

ü       Project Report Due: submit to the instructor (MSEE233C) by 6:00PM on Mon., May 1

ü       (E-mail submission is accepted for design project reports. PDF or MS-Word format only!)

ü       First Exam: Tue. Mar. 7. In class exam, close book, close notebook, single side Letter paper with equations

ü       Second Exam: Th. Apr. 27. In class exam, open book, open notebook

ü       Submit homework to TA

 

Grading Policy

ü       Same scale for graduate and undergraduate students

ü       Absolute and relative scale ( ~ 40% A, 50% B, 10% C)

ü       2 mid-terms each accounting for 20% of the grade

ü       Design Project accounts for 40% of the grade

ü       Homework assignments and Quiz account for 20%

ü       Late projects or assignments will NOT be accepted

ü       Any form of cheating will be reported to the Dean of students AND result in a failing grade

ü       Must fulfill ABET requirements to get a passing grade

 

CAD LAB

ü       VLSI CAD Lab located in 360 Potter Engineering Center

ü       SUN workstations running Cadence and HSpice

ü       Courtesy key for after-hour access can be obtained from front desk in Potter Engineering Library

ü       Additional workstations in MSEE 189

 

Good Books & Resources

ü       OP-amp tutorial papers

Ø       James E. Solomon, “The Monolithic Op Amp: A Tutorial Study,” IEEE Journal of Solid-State Circuits, vol. sc-9, pp 314-332, Dec 1974

Ø       Paul R. Grey and Robert G. Meyer, “MOS Operational Amplifiers Design – A Tutorial Overview,” IEEE Journal of Solid-State Circuits, vol. sc-17, pp 969-982, Dec. 1982

ü       MOS modeling

Ø       Operation and Modeling of the MOS Transistor, Yannis Tsividis, Oxford University Press; 2nd edition, 2003 (Great book on device modeling)

Ø       University of Berkeley Devices Group (The inventor of the BSIM model. The class use BSIM3V3.1.)

ü       Analog layout techniques

Ø       The Art of Analog Layout, Alan Hastings, Prentice Hall; 2 edition, 2005

ü       CMOS/Bipolar analog integrated circuit design

Ø       CMOS Analog Circuit Design, Phillip E Allen, Douglas R. Holberg, Oxford University Press; 2nd edition, 2002

Ø       Analysis and Design of Analog Integrated Circuits, 4th Edition, Gray, Hurst, Lewis, and Meyer, John Wiley & Sons, 4th Edition, 2001

ü       Switched-capacitor circuits

Ø       Analog MOS Integrated Circuits for signal processing, Roubik Gregorian and Gabor C. Temes, John Wiley & Sons, 1986

Ø       Switched Capacitor Circuits, P.E. Allen and E. Sanchez-Sinencio, Van Nostrand Rienhold, 1984

ü       For advanced readers interested in integrated RF IC design for wireless communications

Ø       RF Microelectronics, Behzad Razavi, Prentice Hall, 1998

Ø       The Design of CMOS Radio-Frequency Integrated Circuits, Thomas Lee, Cambridge, 1998

 

SW & useful links

ü       MatLab- Numerical and signal processing simulation tool (student version available)

ü       Simulink - Block diagram based front-end to MatLab. Powerful. Worth to use.

ü       Matlab primer available here

ü       Mathcad – Everyday mathtool. (student version available)

ü       HSPICE manual in PDF format http://www.eng.abdn.ac.uk/~eng186/spice/ http://www.ee.washington.edu/class/cadta/hspice/

ü       MOSIS scalable design rules

ü       MOSIS Pads directory.

ü       MOSIS web site

ü       Interested students could use SWITCAP for switched capacitor simulation. But SWITCAP simulation is not required for the design project.

ü       Switched capacitor circuit simulator (SWITCAP)
Switcap manual in PDF format (710kB)

ü       Switched-capacitor simulations in Cadence