Xiang Xiao
Ph.D. candidate
Department of Electrical and Computer Engineering
Purdue University, West Lafayette
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I am a Ph.D. student in the Department of Electrical and Computer
Engineering at Purdue University West Lafayette. My advisors are
Prof.
Jaehwan John Lee (IUPUI) and
Prof. Mithuna S.
Thottethodi (PUWL). Before coming to Purdue, I received my bachelor
degree from Zhejiang University,
Hangzhou, China. ¡¡ |
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Research Interest Algorithms in hardware, Multicore memory hierarchies, Hardware/software codesign, Micro-architecture, Systems architecture |
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Research experience Parallel deadlock detection in hardware: Design and implement novel parallel deadlock detection algorithms in hardware for Chip Multiprocessors (CMPs) and Multiprocessor System-on-Chips(MPSoCs). Study the impact of improved deadlock detection on future computer systems that may consists of hundreds of processing cores. Publication [1] [2] [3] [4]. Database performance characterization using simulation methodology: Use the Simics full system simulator and related tools to evaluate TPC-H benchmark performance on various emerging architectures, and study the impact of architectural innovations on database design. Technical Report. Publication [1] Some research projects that I have worked on in the past: Automatic service discovery for semantic web using AI Planning: Extend Graph Planner to automatically construct bio workflow in SIBIOS web service integration system. Publication [1]. Parallel gene expression clustering algorithm: Perform gene expression clustering use Particle Swarm Optimization and Self Organizing Maps. Parallelize the clustering algorithm on large scale Linux cluster using PVM API. Publication [1] [2]. ¡¡ |
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Publications Journal articles J. Lee and Xiang Xiao, "A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity," Accepted by IEEE Computer Architecture Letters, 2008. Xiang Xiao and Jaewhan Lee, "A Novel O(1) Deadlock Detection Methodology for Multi-unit Resource Systems and Its Hardware Implementation for System-on-Chip," Accepted by IEEE Transactions on Parallel and Distributed Systems, 2008. Xiang Xiao and Jaewhan Lee, "A Novel Parallel Deadlock Detection Algorithm and Hardware for Multiprocessor System-on-a-Chip," IEEE Computer Architecture Letters, vol. 6, Aug. 2007. Xiang Xiao, Ernst R. Dow, Russell Eberhart, Zina Ben Miled and Robert J. Oppelt, "A Hybrid Self-organizing Maps and Particle Swarm Optimization approach: Research Articles," Concurrency and Computation: Practice & Experience, pp. 895-915, vol. 16, no. 9, Aug. 2004. Conference papers Xiang Xiao, Tuo Shi, Pranav Vaidya and J. Lee, "R-Tree: A Hardware Implementation," the International Conference on Computer Design (CDES¡¯08), pp. 3-9, July 2008. Xiang Xiao and J. Lee, "Main Memory DBMS on Modern Processors, a Scalable Approach for Database Performance Characterization Using Simulation," International Workshop on Scalable Data Management Applications and Systems (SDMAS) with the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA¡¯08), pp. 617-623, July 2008. Xiang Xiao and Jaewhan Lee, "A Novel Parallel Deadlock Detection Algorithm and Architecture for Multi-unit Resource Systems," the 25th IEEE International Conference on Computer Design (ICCD'07), pp. 480-487, Oct. 2007. Xiang Xiao, Malika Mahoui, Zina Ben Miled and B. Choudhury, "The Automation of SIBIOS Workflow Composition," the 6th IEEE Symposium on Bioninformatics and Bioengineering (BIBE'06), pp. 307-314, Oct. 2006. Xiang Xiao, Ernst R. Dow, Russell Eberhart, Zina Ben Miled and Robert J. Oppelt, "Gene Clustering Using Self-Organizing Maps and Particle Swarm Optimization," the 17th IEEE International Symposium on Parallel and Distributed Processing (IPDPS'03), pp. 154.2, Apr. 2003. |